Design, processing, and testing of LSI arrays for space station
Abstract
Data for the beam-leaded silicon-on-sapphire (SOS) process using the TA5388 dual-complementary pair plus inverted circuit show the stability of the dc device characteristics through the complete beam-lead processing and packaging steps. A more complex circuit, the TA6567 - a silicon-gate, voltage-sense BL/CMOS/SOS 256-bit RAM, has also been made that was functionally perfect at wafer probe. Efforts to increase the yield of this circuit and to obtain electrically perfect packaged units are discussed.
- Publication:
-
Quarterly Technical Report
- Pub Date:
- March 1975
- Bibcode:
- 1975rca..reptQ....S
- Keywords:
-
- Large Scale Integration;
- Space Stations;
- Circuits;
- Performance Tests;
- Random Access Memory;
- Silicon Junctions;
- Silicon Transistors;
- Wafers;
- Electronics and Electrical Engineering