The field-effect transistor with completely diffused vertical channel

The work describes design, fabrication, and analysis by computer simulation of a silicon FET device having a single entirely diffused channel and realized by conventional technology. Choice of technological parameters and their effect on performance are studied. The electrical properties of the device operating under reverse and direct grid bias were investigated in actual experiments, while more precise study of the functioning of the device was accomplished through complete two-dimensional digital simulation. Of special interest was the triode behavior of the output characteristics. In the device studied, this behavior is evidently related to the absence of a true pinch in the channel. It is not the resistance between the source and the pinch point that defines the current, as in the classical FET, but the resistance of the conduction channel bounded by the strong depletion zones of the grid junction and extending toward the drain beyond the channel striction zone.