Design of totally self-checking asynchronous sequential machines
Abstract
Properties of state assignments and circuit realizations that lead to totally self-checking asynchronous machine designs are studied. The state variables and the outputs are encoded so that all single and unidirectional faults cause the machine to assume a noncode state or output. Several state assignment methods are presented. One is the two-rail assignment where the feedback lines are checked with a two-rail checker tree. It is shown that any two-rail checker cannot be used because the state assignment does not in general have all the two-rail codewords. Therefore a checker tree that can be checked by the state assignment code must be selected. An algorithm for finding such a tree is presented. The effect of a fault on the encoded outputs is studied. A self-checking circuit produces a noncode output for at least one code space input. It is shown that a self-checking asynchronous machine will produce a noncode output for at least one input sequence which occurs under normal operation. For this design, the destination sets of each input column of the flow table are encoded with a constant weight or another unordered code. Redundancies in the code and in the realization are discussed. It is shown that extra outputs can be used for the detection of primary input faults and for a class of flow tables for faster fault detection.
- Publication:
-
Ph.D. Thesis
- Pub Date:
- May 1975
- Bibcode:
- 1975PhDT.........7O
- Keywords:
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- Error Detection Codes;
- Redundant Components;
- Sequential Computers;
- Gates (Circuits);
- Logic Circuits;
- Redundancy Encoding;
- Switching Circuits;
- Electronics and Electrical Engineering