Properties of a diffused J FET with vertical channel arrangement
Abstract
The electrical properties and operation analysis of an entirely diffused test J FET with vertical channel arrangement for high power applications is presented. The gate was buried for wider available area on which to put the source contact. The device can operate at hundreds of watts dc but still displays isolation deficiencies hindering the production of large devices. Devices with pinched off and opened channels were produced.
- Publication:
-
Presented at the 4th European Solid State Device Res. Conf
- Pub Date:
- 1974
- Bibcode:
- 1974ssdr.conf...16M
- Keywords:
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- Conferences;
- Electrical Measurement;
- Field Effect Transistors;
- Integrated Circuits;
- Junction Transistors;
- Power Gain;
- Additives;
- Carrier Injection;
- Characterization;
- Epitaxy;
- Graphs (Charts);
- Numerical Analysis;
- System Failures;
- Electronics and Electrical Engineering