Improvement of the resistance to radiation of bipolar silicon planar transistors

A process is reported with which the ionization damage of bipolar silicon planar transistors can be greatly reduced. This process consists of irradiation-temperature treatment for prepared transistor units (dose 1-10 billion rad, temperature 200-300 C) followed by a bias-temperature treatment to complete the annealing of the radiation damage produced by the preceding step. With this hardening process, n-p-n transistors are more suitable than p-n-p transistors. The results are shown for two types of silicon n-p-n transistors. One type has a very thin base region and, hence, is already insensitive to displacement damage. The physical reasons for the improvement effect are also discussed.