A testability measure which provides a numerical estimate for the ease of generating fault detection tests for large digital circuits was developed. The measure is intended to be used as a tool to help design digital circuits for which test generation is less costly and less time-consuming than it is for circuits designed without considering testability. The testability measure is based on a register-transfer (RT) level circuit description because such a level of description is the most appropriate one for large digital circuits. Further, the RT level description employs functional components rather than logic gates as the basic units, so it can be obtained early in the design process, yet it is specific enough that it contains sufficient information about the circuit to estimate testability.
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- Digital Systems;
- Circuit Diagrams;
- Nondestructive Tests;
- Electronics and Electrical Engineering