Stress and Strain Measurement in Stressed Silicon Lines
Abstract
Stressed Si lines are attractive conduction channels for transistors due to the improvement of the carrier velocity. The stress and strain in 1 μm width Si lines on top of silicon oxide have been characterized by analysing plan view Moiré patterns obtained by transmission electron microscopy (TEM) and comparing them with Raman spectroscopy and X-ray diffraction results. A good agreement is found between experimental measurements and results from simulations, which validates our approach of measuring structural deformation by Moiré fringes. Regions having a Si substrate thicker than 400nm produce Moiré period profiles similar to the ones that would be obtained on the initial thick wafer. The relaxation of the stress at the edge of the lines is clearly shown in Moiré fringe images.
- Publication:
-
Microscopy of Semiconducting Materials 2007
- Pub Date:
- 2008
- DOI:
- 10.1007/978-1-4020-8615-1_91
- Bibcode:
- 2008msm..book..419B